A 2048-Point FFT Processor Based on Twiddle Factor Table Reduction

In long-point fast Fourier transform (FFT) processing, the table size is large enough to occupy significant area and power consumption. The proposed algorithm can reduce the required table size to half, compared to the radix-2 algorithm, while retaining the simple structure. To verify the proposed algorithm, a 2048-point pipelined FFT processor is designed using a 0.13 μm CMOS process. By combining the proposed algorithm and the radix-2 algorithm, the table size is reduced to 34% and 51% compared to the radix-2 and radix-2 algorithms, respectively. The FFT processor achieves a signal-to-quantization-noise ratio (SQNR) of 52.8 dB.